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2001 Microchip Technology Inc.
Preliminary
DS39544A-page 141
PIC16C925/926
15.1
DC Characteristics
PIC16LC925/926
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
≤ TA ≤ +85°C for industrial
0°C
≤ TA ≤ +70°C for commercial
PIC16C925/926
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
≤ TA ≤ +85°C for industrial
0°C
≤ TA ≤ +70°C for commercial
Param
No.
Sym
Characteristic
Min
Typ Max Units
Conditions
VDD
Supply Voltage
D001
D001A
PIC16LC925/926
2.5
4.5
—
5.5
V
LP, XT and RC osc configuration
HS osc configuration
D001
D001A
PIC16C925/926
4.0
4.5
—
5.5
V
XT, RC and LP osc configuration
HS osc configuration
D002
VDR
RAM Data Retention
Voltage (Note 1)
—
1.5
—
V
Device in SLEEP mode
D003
VPOR
VDD Start Voltage
to ensure internal
Power-on Reset signal
—
VSS
—
V
See Power-on Reset section for details
D004
SVDD
VDD Rise Rate
to ensure internal
Power-on Reset signal
0.05
——
V/ms See Power-on Reset section for details
(Note 6)
D005
VBOR
Brown-out Reset
voltage trip point
3.65
—
4.35
V
BODEN bit set
IDD
Supply Current (Note 2)
D010
D011
PIC16LC925/926
—
.6
225
2.0
48
mA
A
XT and RC osc configuration
FOSC = 4 MHz, VDD = 3.0V (Note 4)
LP osc configuration
FOSC = 32 kHz, VDD = 3.0V, WDT disabled
D010
D011
D012
PIC16C925/926
—
2.7
35
7
5
70
10
mA
A
mA
XT and RC osc configuration
FOSC = 4 MHz, VDD = 5.5V (Note 4)
LP osc configuration
FOSC = 32 kHz, VDD = 4.0V
HS osc configuration
FOSC = 20 MHz, VDD = 5.5V
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin load-
ing and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on
the current consumption.The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail;
all I/O pins tri-stated, pulled to VDD
MCLR = VDD.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc configuration, current through REXT is not included. The current through the resistor can be esti-
mated by the formula Ir = VDD/2REXT (mA) with REXT in kOhm.
5: The
current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
6: PWRT must be enabled for slow ramps.
7:
ΙLCDT1 and ΙLCDRC includes the current consumed by the LCD Module and the voltage generation
circuitry. This does not include current dissipated by the LCD panel.
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